Solid-state imager apparatus which carries out both progressive scanning and interlace scanning in one frame by an arbitrary combination, and a camera using the solid-state imager apparatus
US7893979B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 19, 2007 |
| Grant date | Feb 22, 2011 |
| Priority date | — |
| Expiry date | May 6, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N25/7795
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
In an XY address type solid-state imager apparatus comprising a solid-state imager having a plurality of pixels two-dimensionally arranged, and horizontal and vertical scanning circuits to read signals of the pixels, the scanning circuits each have a progressive scanning circuit to progressively read pixel signals by a first scanning control signal, and an interlace scanning circuit to read pixel signals with an interlaced manner by a second scanning control signal different from the first scanning control signal, and arbitrarily carries out combining of progressive reading and interlace reading in one frame in accordance with a combination of the respective scanning control signals, and reads pixel signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.