Duty cycle measurement for various signals throughout an integrated circuit device
US7895005B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 20, 2007 |
| Grant date | Feb 22, 2011 |
| Priority date | — |
| Expiry date | Jun 2, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/31725
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A mechanism is provided for measuring the absolute duty cycle of a signal anywhere on an integrated circuit device. The mechanism employs a circuit having a plurality of substantially identical pulse shaper elements, each of which expand the pulse of an input signal whose duty cycle is to be measured by a same amount. The outputs of the pulse shaper elements may be coupled to substantially identical divider circuits whose outputs are coupled to a multiplexer that selects two inputs for output to a set of master/slave configured flip-flops, one input serving as a clock and the other as data to the flip-flops. The flip-flops sample the divider outputs selected by the multiplexer to detect if the dividers have failed or not. The outputs of the flip-flops are provided to an XOR gate which outputs a duty cycle signal indicative of the duty cycle of the input signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.