Programmable arrayed processing engine architecture for a network switch
US7895412B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 27, 2002 |
| Grant date | Feb 22, 2011 |
| Priority date | — |
| Expiry date | Jul 24, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/8023
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A programmable processing engine processes transient data within an intermediate network station of a computer network. The engine comprises an array of processing elements symmetrically arrayed as rows and columns, and embedded between input and output buffer units with a plurality of interfaces from the array to an external memory. The external memory stores non-transient data organized within data structures, such as forwarding and routing tables, for use in processing the transient data. Each processing element contains an instruction memory that allows programming of the array to process the transient data as processing element stages of baseline or extended pipelines operating in parallel.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.