Instruction dependent dynamic voltage compensation
US7895454B2 · kind B2 · utility
12Cited by
42References
15Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Feb 6, 2007 |
| Grant date | Feb 22, 2011 |
| Priority date | — |
| Expiry date | Mar 21, 2029 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for compensating for dynamic IR (voltage) drop for instruction execution. In a data processing system having a memory, and a central processing unit (CPU), where the CPU includes an adaptive power supply, a method is provided for determining the power required for instruction execution, adjusting power supplied by the adaptive power supply to the CPU to execute the instruction, and dispatching the instruction from the memory to the CPU for execution.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.