Patent · US Active

Memory preserved cache failsafe reboot mechanism

US7895465B2 · kind B2 · utility

7Cited by
6References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJun 3, 2008
Grant dateFeb 22, 2011
Priority date
Expiry dateApr 16, 2029

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F11/2092
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A method, system and computer program product for preserving data in a storage subsystem having dual cache and dual nonvolatile storage (NVS) through a failover from a failed cluster to a surviving cluster, the surviving cluster undergoing a rebooting process, is provided. A memory preserved indicator associated with a cache of the surviving cluster is detected. The memory preserved indicator designates marked tracks having an image in an NVS of the failed cluster to be preserved through the rebooting process. A counter in a data structure of the surviving cache is incremented. If a value of the counter exceeds a predetermined value, a cache memory is initialized, and the marked tracks are removed from the cache to prevent an instance of repetitive reboots caused by a corrupted structure in the cache memory.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.