Method and apparatus for checking pipelined parallel cyclic redundancy
US7895499B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 27, 2006 |
| Grant date | Feb 22, 2011 |
| Priority date | — |
| Expiry date | Nov 2, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/6575
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method and an apparatus for checking a pipelined parallel cyclic redundancy is disclosed. In accordance with the method and the apparatus of the present invention, after an entire CRC (cyclic redundancy check) logic is divided into a feedback portion and an input data portion, the input data portion is divided using a pipelined structure such that the input data portion is designed to have the pipelined structure based on an algorithm that maintains a logic level of each stage to be lower than that of the feedback portion and an algorithm that optimizes a size of a register inserted during the division to improve a speed thereof and to detect an error of a received data in a high speed data communication apparatus.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.