Systems and methods for reduced complexity LDPC decoding
US7895500B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 21, 2007 |
| Grant date | Feb 22, 2011 |
| Priority date | — |
| Expiry date | Dec 22, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L1/0057
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Systems and methods for generating check node updates in the decoding of low-density parity-check (LDPC) codes use new approximations in order to reduce the complexity of implementing a LDPC decoder, while maintaining accuracy. The new approximations approximate the standard sum-product algorithm (SPA), and can reduce the approximation error of min-sum algorithm (MSA) and have almost the same performance as sum-product algorithm (SPA) under both floating precision operation and fixed-point operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.