Phase detector circuitry

US7898307B2 · kind B2 · utility

Assignee

• FUJITSU SEMICONDUCTOR LIMITED · JP

Inventors

• Walter Marton · Frankfurt, DE
• Robert E. Braun · Bar Harbor, US

Key dates

• Filing date: Dec 30, 2008
• Grant date: Mar 1, 2011
• Expiry date: Feb 20, 2029

Classification

• Technology area (CPC H): Electricity
• CPC primary: H03L7/1974
• WIPO field: Basic communication processes
• WIPO sector: Electrical engineering

Abstract

A phase-locked loop frequency synthesizer including phase detector circuitry and divider circuitry producing a divided signal. The phase detector circuitry receives a reference signal, a divided signal fed back from the divider circuitry, and generates control pulses which control a charge pump in accordance with a frequency and phase relationship between the reference signal and the divided signal. The divider circuitry has a main divider which divides an input signal by a division ratio selected from a pair of dual modules division ratios, and outputs the divided input signal as an output signal and an auxiliary divider which produces serial output data, each bit of which serves as a dual modules selection signal to cause the main divider to operate using one of the pair of dual modules main division ratios. The auxiliary divider produces the divided signal once per cycle and outputs the pulse to the phase detector circuitry.