Microprocessor apparatus and method for employing configurable block cipher cryptographic algorithms
US7900055B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 15, 2004 |
| Grant date | Mar 1, 2011 |
| Priority date | — |
| Expiry date | Dec 16, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2209/125
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus for performing cryptographic operations. The apparatus includes an x86-compatible microprocessor that has fetch logic, algorithm logic, and execution logic. The fetch logic is configured to receive a single, atomic cryptographic instruction as one of the instructions in an application program executing on the x86-compatible microprocessor. The single, atomic cryptographic instruction prescribes an encryption operation and one of a plurality of cryptographic algorithms. The algorithm logic is operatively coupled to the single, atomic cryptographic instruction. The algorithm logic directs the x86-compatible microprocessor to execute the encryption operation according to the one of a plurality of cryptographic algorithms. The execution logic is operatively coupled to the algorithm logic. The execution logic executes the encryption operation. The execution logic includes a cryptography unit for executing a plurality of cryptographic rounds required to complete the encryption operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.