Method and system for monitoring module power status in a communication device
US7900065B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 2, 2004 |
| Grant date | Mar 1, 2011 |
| Priority date | — |
| Expiry date | Mar 24, 2026 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D30/70
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
Methods and systems for monitoring operating status of a device are provided. Aspects of the method may include receiving within a chip, a signal indicative of a power status of an on-chip device. An output signal indicative of the power status may be generated from within the chip, while the chip is operating. The generated output signal may be communicated outside the chip via a serial bus, a plurality of pin connections on said chip, and/or a general purpose input/output connection. The generated output signal may be multiplexed on at least one pin on the chip and it may comprise a clock signal and/or a data signal. The data signal may comprise sequential power status information for a plurality of on-chip devices.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.