Patent · US Active

Structure to measure both interconnect resistance and capacitance

US7900164B1 · kind B1 · utility

4Cited by

2References

14Claims

0Family size

Assignee

Altera Corporation · US

Inventors

Shuxian Chen · Fremont, US
Jeffrey T. Watt · Palo Alto, US

Key dates

Filing date	Jan 16, 2004
Grant date	Mar 1, 2011
Priority date	—
Expiry date	Dec 22, 2028

Classification

Technology area (CPC H)Electricity
CPC primaryH01L22/34
WIPO fieldMeasurement
WIPO sectorInstruments

Abstract

A structure for measuring both interconnect resistance and capacitance. The structure comprises a plurality of metallic interconnects, a first circuit for measuring capacitance charging current at a first interconnect and a second circuit for measuring the voltage drop between two positions at a second interconnect. The first circuit includes two electrically connected pseudo-inverters. Two control signals are fed into the two pseudo-inverters such that their associated capacitances are charged and discharged periodically. The first interconnect capacitance is determined by measuring the difference of charging currents between the two pseudo-inverters. A constant current flows through the second circuit and the interconnect resistance is determined by the voltage drop and the constant current.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.