Compression and decompression of configuration data using repeated data frames
US7902865B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 15, 2007 |
| Grant date | Mar 8, 2011 |
| Priority date | — |
| Expiry date | Oct 6, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M7/30
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Various techniques are provided to compress and decompress configuration data for use with programmable logic devices (PLDs). In one example, a method includes embedding a first data frame comprising a data set from an uncompressed bitstream into a compressed bitstream. The method also includes embedding a first instruction to instruct a PLD to load the first data frame into a data shift register, embedding a second instruction to instruct the PLD to load a first address associated with the first data frame into an address shift register, and embedding a third instruction to instruct the PLD to load the first data frame from the data shift register into a first row of a configuration memory corresponding to the first address. The method further includes identifying a second data frame comprising the data set in the uncompressed bitstream, and embedding fourth and fifth instructions in place of the second data frame.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.