Wires on demand: run-time communication synthesis for reconfigurable computing
US7902866B1 · kind B1 · utility
30Cited by
1References
19Claims
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Key dates
| Filing date | Aug 27, 2008 |
| Grant date | Mar 8, 2011 |
| Priority date | — |
| Expiry date | Nov 25, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/34
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method, and system, for reconfiguring an FPGA which has a static region and a dynamic region is provided. The method includes the steps of: (a) providing a dynamic module library having information of predetermined modules; (b) receiving a reconfiguration request external to the FPGA; (c) computing reconfiguration of the FPGA at a predetermined location using predetermined module information from the dynamic module library and the reconfiguration request, and generating reconfigurable partial bitstreams; and (d) sending partial bitstreams from the predetermined location to the FPGA to perform the reconfiguration.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.