Analogue self-calibration method and apparatus for low noise, fast and wide-locking range phase locked loop
US7902929B2 · kind B2 · utility
2Cited by
12References
17Claims
0Family size
Assignee
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Key dates
| Filing date | Jan 19, 2009 |
| Grant date | Mar 8, 2011 |
| Priority date | — |
| Expiry date | Jan 19, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L2207/05
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method of operating a phase lock loop includes generating a control voltage based on both an output signal of a voltage-controlled oscillator and a reference signal. An operating mode is selected from one of a high-gain mode, a zero-gain mode and a low-gain mode based on the control voltage. The phase lock loop is operated in the selected one of the high-gain mode, the zero-gain mode, and the low-gain mode. The control voltage is offset to generate an offset voltage based on the selected operating mode. The output signal is generated based on the offset voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.