Method and system for synchronizing parallel engines in a graphics processing unit
US7903120B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Oct 17, 2006 |
| Grant date | Mar 8, 2011 |
| Priority date | — |
| Expiry date | Sep 17, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/102
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and system are disclosed for synchronizing two or more engines in a graphics processing unit (GPU). When issuing a command to an engine, a central processing unit (CPU) writes an event value representing the command into an element of an event memory associated with the engine. After executing the command, the engine modifies the content of the event memory in order to recognize the completion of the command execution. The CPU acquires the command execution status by reading the modified content of the event memory. With precise knowledge of the command execution status, the CPU can issue commands to various engines independently, hence the engines can run parallel.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.