Equalize training method using re-encoded bits and known training sequences
US7903728B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 28, 2009 |
| Grant date | Mar 8, 2011 |
| Priority date | — |
| Expiry date | Apr 28, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/03133
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Equalizer training method using re-encoded bits and known training sequences. A multi-branch equalizer processing module is operable to cancel interference associated with received radio frequency (RF) burst(s) (e.g., using at least a first equalizer processing branch and a second equalizer processing branch). The first equalizer processing branch is operable to be trained based upon known training sequences and to equalize the received RF burst. The second equalizer processing branch uses at least partially re-encoded data bits to train linear equalizer(s) within the second equalizer processing branch. A buffer may initially store the received RF burst(s), which are retrieved and equalized by the second equalizer processing branch once the linear equalizer(s) are trained. The cooperation operation of these and other various components allows interfering signals to be cancelled and for more accurate processing of the received RF bursts to occur.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.