Absolute duty cycle measurement
US7904264B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 12, 2007 |
| Grant date | Mar 8, 2011 |
| Priority date | — |
| Expiry date | Sep 1, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R29/0273
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A mechanism for measuring the absolute duty cycle of a signal is provided. A non-inverted path from a signal source is selected and various DCC circuit setting indices are cycled through until a divider, coupled to the output of the DCC circuit, fails. A first minimum pulse width at which the divider fails is then determined based on the index value of the DCC circuit at the time of the failure. An inverted path from the signal source is selected and the various DCC circuit setting indices are cycled through again until the divider fails. A second minimum pulse width at which the divider fails is then determined based on the index value of the DCC circuit at the time of this second failure. The duty cycle is then calculated based on a difference of the first and second minimum pulse width values.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.