Compound instructions in a multi-threaded processor
US7904702B2 · kind B2 · utility
1Cited by
7References
7Claims
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Key dates
| Filing date | Aug 13, 2008 |
| Grant date | Mar 8, 2011 |
| Priority date | — |
| Expiry date | Sep 10, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3853
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A multi-threaded processor determines which threads to execute, switches between execution of threads in dependence on the determination, each thread being coupled to a respective register for storing the state of the thread and used in executing instructions on the thread and includes a further register shared by all the threads. The executing threads use the further register to improve execution performance and prevents the switching of execution to another thread while the internal register is in use.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.