Relocatable field programmable gate array bitstreams for fault tolerance
US7906984B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 26, 2009 |
| Grant date | Mar 15, 2011 |
| Priority date | — |
| Expiry date | May 10, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/17764
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A Field Programmable Gate Array (FPGA) circuit capable of operating through at least one fault. The FPGA circuit includes a configuration memory and an embedded microprocessor. The embedded microprocessor having access to the configuration memory, static modules, at least one relocatable module, and at least one spare module. The relocatable module being relocatable from a first target area to a second target area. The relocatable module being relocatable by manipulating a partial bitstream with the embedded microprocessor. The microprocessor calculating a plurality of bitstream changes, to relocate the at least one relocatable module using at least triple modular redundancy (TMR).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.