Multi-port memory device for buffering between hosts and non-volatile memory devices
US7907469B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 31, 2008 |
| Grant date | Mar 15, 2011 |
| Priority date | — |
| Expiry date | Sep 12, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/2245
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A multi-port volatile memory device can include a first port that is configured for data transfer to/from an external host system and the device. A volatile main memory core is configured to store data received thereat and read requested stored data thereform. A volatile sub memory core can be configured to store data received thereat and read requested stored data therefrom. A main interface circuit can be coupled to the first port and can be configured to provide data to/from the volatile main memory core and the first port in a master mode and can be configured to provide data to/from the volatile sub memory core and the first port in a slave mode. A second port can be configured for data transfer to/from an external non-volatile memory device and the device and a sub interface circuit can be coupled to the second port and configured to provide data to/from the volatile sub memory core and the second port in the slave mode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.