Patent · US Active

Tolerable synchronization circuit of RDS receiver

US7907680B2 · kind B2 · utility

14Cited by

2References

18Claims

0Family size

Assignee

Himax Technologies Limited · TW

Inventors

Tien-Ju Tsai · Danei, TW
Chih-Feng Lin · Hsinchu, TW
Shih-Chuan Lu · Danei, TW

Key dates

Filing date	Jan 3, 2008
Grant date	Mar 15, 2011
Priority date	—
Expiry date	Oct 26, 2029

Classification

Technology area (CPC H)Electricity
CPC primaryH04H2201/13
WIPO fieldTelecommunications
WIPO sectorElectrical engineering

Abstract

A Radio Data System (RDS) decoder circuit determines a subcarrier frequency utilizing only a 57 kHz RDS signal of an FM broadcast signal. The RDS decoder includes a zero-intermediate frequency (zero-IF) FM demodulator, a first mixer, a low-pass filter (LPF) unit, a shaping filter unit, a carrier recovery circuit, a digitally controlled oscillator (DCO), a symbol timing recovery circuit, an integrate and dump circuit, a slicer 280, and a differential decoder. The carrier recovery circuit includes a phase error detector and a digital loop filter (DLF). The symbol timing recovery circuit includes a zero-crossing detector, a phase detector and loop filter unit, and a counter.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.