Shift register
US7907696B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 23, 2009 |
| Grant date | Mar 15, 2011 |
| Priority date | — |
| Expiry date | Jun 11, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2320/0266
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A shift register includes a plurality of stages cascade-connected with each other. Each stage includes a pull-up circuit, a pull-up driving circuit, and a pull-down circuit. The pull-up circuit coupled to a first clock signal is used for providing an output signal. The pull-up driving circuit includes a control circuit and a first transistor. The control circuit has a gate coupled to a previous stage, and a drain coupled to a second clock signal. The first transistor includes a gate coupled to the source of the control circuit, a drain coupled to a driving end of the previous stage, and a source coupled to a first input end. The pull-down circuit pulls down voltage on the first input end.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.