Process for forming differential spaces in electronics device integrated on a semiconductor substrate

US7910444B2 · kind B2 · utility

Assignee

• STMicroelectronics SA

Inventors

• Giorgio Servalli · Ciserano, IT
• Giulio Albini · Boise, US
• Carlo Cremonesi · Vaprio d'Adda, IT

Key dates

• Filing date: Oct 27, 2009
• Grant date: Mar 22, 2011
• Expiry date: Oct 27, 2029

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10B41/49

Abstract

A forms spacers in a electronic device integrated on a semiconductor substrate that includes: first and second transistors each comprising a gate electrode projecting from the substrate and respective source/drain regions. The process comprises: forming in cascade a first protective layer and a first conformal insulating layer of a first thickness on the whole electronic device; forming a first mask to cover the first transistor; removing the first conformal insulating layer not covered by the first mask; removing the first mask; forming a second conformal insulating layer of a second thickness on the whole device; and removing the insulating layers until the protective layer is exposed to form first spacers of a first width on the side walls of the gate electrodes of the first transistor and second spacers of a second width on the side walls of the gate electrodes of the second transistor.