Clock switch-over circuits and methods
US7911240B1 · kind B1 · utility
6Cited by
3References
22Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 17, 2007 |
| Grant date | Mar 22, 2011 |
| Priority date | — |
| Expiry date | Jul 21, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Clock switch-over circuits and methods provide clock signals to clock routing networks. According to one embodiment, a multiplexer selects between a first clock signal and a second clock signal in response to a switch select signal received from a control circuit. A storage circuit stores an enable signal in response to an output clock signal of the multiplexer. A logic circuit transmits the output clock signal of the multiplexer to a clock routing network in response to the enable signal from the storage circuit. At least one signal is transmitted from the clock switch-over circuit to the control circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.