Monitored notification facility for reducing inter-process/inter-partition interrupts
US7913009B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 20, 2007 |
| Grant date | Mar 22, 2011 |
| Priority date | — |
| Expiry date | Sep 4, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/544
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Example operations related to deferring interrupts are herein disclosed. In one example embodiment, a method includes, but is not limited to, writing a message to a memory location shared between a sender and a receiver; and requesting that an interrupt be transmitted to the receiver after a specified latency has elapsed, wherein an interrupt that is pending is stored in a trigger memory. It can be appreciated by one of skill in the art that one or more various aspects of the disclosure may include but are not limited to circuitry and/or programming for effecting the herein-referenced aspects; the circuitry and/or programming can be virtually any combination of hardware, software, and/or firmware configured to effect the herein-referenced aspects depending upon the design choices of the system designer. In addition to the foregoing, other aspects are described in the claims, drawings, and text forming a part of the present application.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.