Semiconductor memory device and method for manufacturing the same
US7915156B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 24, 2009 |
| Grant date | Mar 29, 2011 |
| Priority date | — |
| Expiry date | Apr 8, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/035
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device has a semiconductor substrate, a plurality of word lines formed at predetermined intervals on the semiconductor substrate, each word line having a gate insulating film, a charge storage layer, a first insulating film, and a controlling gate electrode which are stacked in order, and including a metal oxide layer above the level of the gate insulating film, a second insulating film covering a side of the word line and a surface of the semiconductor substrate between the word lines, and having a film thickness of 15 nm or less, and a third insulating film formed between the word lines adjacent to each other such that a region below the level of the metal oxide layer has a cavity.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.