Phase interpolator circuits and methods
US7915941B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 1, 2009 |
| Grant date | Mar 29, 2011 |
| Priority date | — |
| Expiry date | Jul 3, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03J2200/10
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A phase interpolator circuit includes first and second low pass filter circuits and a multiplier circuit. The first low pass filter circuit increases a common mode voltage of a clock signal to generate a first varying signal. The second low pass filter circuit increases a common mode voltage of a clock signal to generate a second varying signal. The first low pass filter circuit can include a first variable capacitance, and the second low pass filter circuit can include a second variable capacitance. The multiplier circuit has a first input coupled to the first low pass filter circuit and a second input coupled to the second low pass filter circuit. The multiplier circuit generates a third varying signal in response to the first and the second varying signals. The phase interpolator circuit generates a phase shift in the third varying signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.