Time-interleaved-dual channel ADC with mismatch compensation
US7916050B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 15, 2009 |
| Grant date | Mar 29, 2011 |
| Priority date | — |
| Expiry date | Oct 20, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/123
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Previously, when designing receivers for radio frequency (RF) or wireless communications, designers chose between time-interleaved (TI) analog-to-digital converters (ADCs) for intermediate frequency architectures and dual channel ADCs for direct conversion architectures. Here, similarities between TI ADCs and dual channel ADC were recognized, and an ADC that has the capability of operating as a TI ADCs and dual channel ADC is provided. This allows designer to have greatly increased flexibility during the design process which can greatly reduce design costs, while also allowing the manufacturer of the ADC to realize a reduction in its operating costs.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.