Apparatus and method for sigma-delta analog to digital conversion
US7916061B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 21, 2009 |
| Grant date | Mar 29, 2011 |
| Priority date | — |
| Expiry date | May 5, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M3/456
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method and apparatus are provided for sigma-delta (ΣΔ) analog to digital conversion, the method including receiving an analog signal, sampling the received signal, comparing the sampled signal with a constant reference voltage, providing at least one high-order bit responsive to the constant reference comparison, comparing the sampled signal with a variable reference voltage, providing at least one low-order bit responsive to the variable reference comparison, and combining the at least one high-order bit with the at least one low-order bit; and the apparatus including a comparator, a first ADC portion supplying the comparator with a constant reference voltage for providing at least one high-order bit, and a second ADC portion supplying the comparator with a variable reference voltage for providing at least one low-order bit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.