Flow and congestion control in switch architectures for multi-hop, memory efficient fabrics
US7916718B2 · kind B2 · utility
3Cited by
16References
9Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 19, 2007 |
| Grant date | Mar 29, 2011 |
| Priority date | — |
| Expiry date | Aug 22, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L49/254
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A shared memory switch and switch fabric architecture are described which employ partitions of the shared memory to implement multiple, independent virtual congestion domains, thereby allowing congestion to be handled for different classes of traffic independently.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.