Structure for a duty cycle measurement circuit

US7917318B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• David William Boerstler · Round Rock, US
• Eskinder Hailu · Austin, US
• Masaaki Kaneko · Kariya, JP
• Jieming Qi · Austin, US
• Bin Wan · Beijing, CN

Key dates

• Filing date: May 30, 2008
• Grant date: Mar 29, 2011
• Expiry date: Apr 12, 2029

Classification

• Technology area (CPC G): Physics
• CPC primary: G01R31/31727
• WIPO field: Measurement
• WIPO sector: Instruments

Abstract

A design structure for a circuit for measuring the absolute duty cycle of a signal anywhere on an integrated circuit device is provided. The circuit has a plurality of substantially identical pulse shaper elements, each of which expand the pulse of an input signal whose duty cycle is to be measured by a same amount. The outputs of the pulse shaper elements may be coupled to substantially identical divider circuits whose outputs are coupled to a multiplexer that selects two inputs for output to a set of master/slave configured flip-flops, one input serving as a clock and the other as data to the flip-flops. The flip-flops sample the divider outputs selected by the multiplexer to detect if the dividers have failed or not. The outputs of the flip-flops are provided to an XOR gate which outputs a duty cycle signal indicative of the duty cycle of the input signal.