Apparatus and method for computing LLR
US7917834B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 7, 2006 |
| Grant date | Mar 29, 2011 |
| Priority date | — |
| Expiry date | Jan 26, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/6502
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Provided are an apparatus and method for efficiently computing a log likelihood ratio (LLR) using the maximum a posteriori (MAP) algorithm known as block combining. The method includes the steps of: calculating alpha values, beta values and gamma values of at least two time sections; calculating transition probabilities of respective states in the at least two time sections; performing a comparison operation for some of the transition probabilities to determine the highest value, selecting one of the other transition probabilities according to the determined high value, comparing the determined value with the selected value to select the higher value, and thereby obtaining the highest of the transition probabilities; and determining an operation to apply according to the highest transition probability and calculating an LLR.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.