Multilayer chip capacitor
US7920370B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 5, 2007 |
| Grant date | Apr 5, 2011 |
| Priority date | — |
| Expiry date | Oct 31, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01G4/232
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A multilayer chip capacitor includes: a capacitor body having first and second side surfaces and a bottom surface; a plurality of first and second internal electrodes in the capacitor body; first and second external electrodes having a first polarity and formed on the first and second side surfaces, respectively, to cover a respective lower edge of the side surfaces and to partially extend to the bottom surface; and a third external electrode having a second polarity and formed on the bottom surface. The internal electrodes are disposed in perpendicular to the bottom surface. Each of the first internal electrodes has a first lead drawn to the first side and bottom surfaces and a second lead drawn to the second side and bottom surfaces. Each of the second internal electrodes has a third lead drawn to the bottom surface.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.