DQPSK transmitter with parallel precoder and high-speed DQPSK data stream realignment
US7920796B2 · kind B2 · utility
7Cited by
2References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 15, 2007 |
| Grant date | Apr 5, 2011 |
| Priority date | — |
| Expiry date | Feb 2, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L27/2096
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
The present invention utilizes field programmable gate arrays (FPGAs) to implement a parallel differential quadrature phase shift keying (DQPSK) precoder and a DQPSK optical transmitter with an automatic realignment process. The present invention can perform DQPSK preceding, modulation, and data stream realignment at any lower rate, and its upper rate is determined by capability in speed and logic resources and external connections of available integrated circuit technology.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.