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US7921165B2 · kind B2 · utility

4Cited by
35References
17Claims
0Family size

Assignee

Inventors

Key dates

Filing dateNov 30, 2005
Grant dateApr 5, 2011
Priority date
Expiry dateApr 22, 2027

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH04L51/42
  • WIPO fieldDigital communication
  • WIPO sectorElectrical engineering

Abstract

A processor 104 executes computer-executable instructions to receive messages 302; store 304 the received messages in a foreground memory 108; process 306 the stored messages in the foreground memory 108; send 306 the processed messages; move 308 the sent messages to a background memory 110; evaluate 310, 312 the messages in the background memory with respect to a parameter; and delete 314 selected messages in the background memory as a function of the evaluating. Alternatively, a message queue may be used to track lost messages.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.