Patent · US Active

Design methodology for MuGFET ESD protection devices

US7923266B2 · kind B2 · utility

172Cited by
0References
13Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMay 7, 2009
Grant dateApr 12, 2011
Priority date
Expiry dateOct 9, 2029

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D30/024

Abstract

A method for manufacturing a MuGFET ESD protection device having a given layout by means of a given manufacturing process, the method comprising selecting multiple interdependent layout and process parameters of which a first set are fixed by said manufacturing process and a second set are variable, selecting multiple combinations of possible layout and process parameter values which meet predetermined ESD constraints; determining an optimum value for at least one other parameter in view of a predetermined design target apart from the predetermined ESD constraints; determining values for fin width (Wfin), gate length (LG) and number of fins (N) on the basis of the optimum value; and manufacturing said MuGFET ESD protection device using the given manufacturing and process values.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.