Method of fabricating recess channel transistor having locally thick dielectrics and related devices
US7923331B2 · kind B2 · utility
8Cited by
3References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 10, 2008 |
| Grant date | Apr 12, 2011 |
| Priority date | — |
| Expiry date | Jan 7, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/018
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Provided are a method of fabricating a recess channel transistor and a related semiconductor device. The method may include forming a first gate trench on a substrate, forming a dielectric spacer on a sidewall of the first gate trench, forming a second gate trench on the substrate under the first gate trench, and forming a gate electrode to fill the trenches. The dielectric spacer may remain between the gate electrode and the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.