Gettering method and a wafer using the same
US7923353B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 27, 2006 |
| Grant date | Apr 12, 2011 |
| Priority date | — |
| Expiry date | May 1, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/67253
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
It is shown in the invention a method for manufacturing a semiconductor wafer structure with an active layer for impurity removal, which method comprises phases of depositing a first layer on a first wafer surface for providing an active layer, an optional phase of preparation for said first layer for next phase, growing thermal oxide layer on a second wafer, bonding said first and second wafers into a stack, annealing the stack for a crystalline formation in said thermal oxide layer as a second layer, and thinning said first wafer to a pre-determined thickness. The invention concerns also a wafer manufactured according to the method, chip that utilizes such a wafer structure and an electronic device utilizing such a chip.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.