Patent · US Active

Fault protection circuit, method of operating a fault protection circuit and a voltage regulator employing the same

US7923976B2 · kind B2 · utility

9Cited by

3References

15Claims

0Family size

Assignee

TEXAS INSTRUMENTS INCORPORATED · US

Inventors

Mohammad Al-Shyoukh · Cedar Park, US
Eric Blackall · Plano, US

Key dates

Filing date	Dec 5, 2008
Grant date	Apr 12, 2011
Priority date	—
Expiry date	Jun 10, 2029

Classification

Technology area (CPC G)Physics
CPC primaryG05F1/569
WIPO fieldControl
WIPO sectorInstruments

Abstract

Embodiments of the present disclosure provide a fault protection circuit, a method of operating a fault protection circuit and a voltage regulator. In one embodiment, the fault protection circuit is for use with the voltage regulator and includes an output power section having first and second MOS transistors configured to provide a regulated voltage on an output node of the voltage regulator. The fault protection circuit also includes a gate pull-down section connected to the first and second MOS transistors and configured to provide a gate pull-down MOS transistor to limit a current through the first and second MOS transistors during a current overload fault condition on the output node.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.