Inter-stage matching network to enhance common mode stability
US7924092B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Oct 22, 2007 |
| Grant date | Apr 12, 2011 |
| Priority date | — |
| Expiry date | Oct 22, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45694
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A two stage amplifier with an inter-stage matching network constituted of a first and a second transistor forming a differential first stage, a third and a fourth transistor forming a differential second stage, an on-chip connection path connecting the emitters of the first and second transistor to the emitters of the third and fourth transistors, a first transformation network and a second transformation network. A collector of the first transistor is operatively connected to a base of the third transistor by the first transformation network and a collector of the second transistor is operatively connected to a base of the fourth transistor by the second transformation network. At least one resistor is provided in the on-chip connection path to stabilize the input of the third and fourth transistors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.