Defining and recording threshold-qualified count events of a simulation by testcases
US7925489B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 31, 2007 |
| Grant date | Apr 12, 2011 |
| Priority date | — |
| Expiry date | Aug 18, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/318357
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A design is simulated utilizing a hardware description language (HDL) simulation model by stimulating the HDL simulation model with a testcase. The HDL simulation model includes instrumentation not forming a portion of the design that includes a count event counter for a count event in the design, and the simulation includes counting occurrences of the count event in the count event counter to obtain a count event value. A threshold is also established for an aggregate count event value for the count event counter. After completion of the testcase, a determination is made whether addition of the count event value to the aggregate count event value for the count event counter would cause the aggregate count event value to exceed the threshold. If not, the count event value is recorded in a testcase data storage area, and the count event value is accumulated in the aggregate count event value. If so, the count event value is discarded without recording the count event value in the testcase data storage area.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.