Dynamically configurable high speed interconnect using a nonlinear element
US7925814B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | May 8, 2008 |
| Grant date | Apr 12, 2011 |
| Priority date | — |
| Expiry date | May 8, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06N7/08
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A dynamically configurable logic gate includes an input summer for receiving a first input signal and a second input signal to generate a summed input signal. Further the dynamically configurable logic gate includes a nonlinear element that applies a nonlinear function to the summed input signal to produce a nonlinear output signal. The dynamically configurable logic gate output signal corresponds to one of a plurality of different logic gates responsive to adjusting the summed input signal and/or the nonlinear function. In another embodiment, the dynamically configurable logic gate includes feedback to one of the inputs. The dynamically configurable logic gate receives the two inputs and operates as one of a plurality of different logic gate types so as to produce an output signal that corresponds to a memory latch according to a selection of the control signal. An array structure of dynamically configurable logic elements is also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.