Patent · US Active

Method and system for a gigabit Ethernet IP telephone chip with integrated DDR interface

US7929518B2 · kind B2 · utility

0Cited by
5References
24Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJun 13, 2005
Grant dateApr 19, 2011
Priority date
Expiry dateOct 21, 2028

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH04W88/02
  • WIPO fieldDigital communication
  • WIPO sectorElectrical engineering

Abstract

Methods and systems for processing data are disclosed herein and may comprise processing data via a single gigabit Ethernet IP telephone chip integrated within a gigabit Ethernet IP telephone. At least a portion of the processed data may be communicated to an off-chip DDR memory within the gigabit IP telephone via an on-chip DDR memory interface integrated within the gigabit IP telephone chip. The data may be acquired from the off-chip DDR memory via the DDR memory interface for the processing. A request to process the data may be received by the gigabit Ethernet IP telephone chip. The request for processing the data may comprise a Memory Read command, a Memory Write command, a Memory Write with Reply command, a Memory Swap command, an Input/Output (I/O) Read command, an I/O Write command, and/or an I/O Write with Reply command.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.