Patent · US Active

High speed differential encoder and interleaver

US7929640B2 · kind B2 · utility

1Cited by
6References
23Claims
0Family size

Assignee

Inventors

Key dates

Filing dateNov 15, 2006
Grant dateApr 19, 2011
Priority date
Expiry dateNov 29, 2028

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH04L27/205
  • WIPO fieldDigital communication
  • WIPO sectorElectrical engineering

Abstract

A plurality of differential encoders encodes a plurality of parallel data bit streams. XOR gates interleave the outputs of the differential encoders forming a single high speed differentially encoded bit stream with a data rate that is the sum of the data rate of the parallel data bit streams. The high speed data stream provides a single differentially encoded input to a differential phase shift keying modulator that generates symbols for a high speed optical communication system.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.