Memory corruption detection system and method using contingency analysis regulation
US7930491B1 · kind B1 · utility
22Cited by
20References
23Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 16, 2005 |
| Grant date | Apr 19, 2011 |
| Priority date | — |
| Expiry date | Sep 14, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0253
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems, methods, apparatus and software can be implemented to detect possible instances of memory corruption. By analyzing memory blocks stored in a memory, provided in a snapshot file, or provided in a core dump, implicit and/or explicit contingency chains can be obtained. Analysis of these contingency chains identifies potential memory corruption sites, and subsequent verification provides greater confidence in the identification.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.