Multi-processor system that reads one of a plurality of boot codes via memory interface buffer in response to requesting processor
US7930530B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 9, 2007 |
| Grant date | Apr 19, 2011 |
| Priority date | — |
| Expiry date | Jan 31, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/177
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Multi-processor systems and methods thereof are provided. In an example, the multi-processor system may include a boot memory including a plurality of boot codes, each of the plurality of boot codes configured to facilitate an initialization process at one of a plurality of intellectual property (IP) blocks, each of the plurality of IP blocks having shared access to the boot memory. In another example, the multi-processor system may receive, from a first processor, a request to provide one of a plurality of boot codes from a boot memory, the received request sent in response to a system initializing signal, may read the requested boot code from the boot memory and may transfer, from a second processor, the read boot code to the first processor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.