Controlling timing dependencies in a mixed signal system-on-a-chip (SOC)
US7930580B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 11, 2007 |
| Grant date | Apr 19, 2011 |
| Priority date | — |
| Expiry date | Nov 30, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N25/00
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The claimed subject matter provides systems and/or methods that facilitate controlling timing dependencies in a mixed signal circuit. Timing performance associated with a horizontal scanner and an analog to digital converter (ADC) can be monitored. Moreover, data related to the monitored timing performance can be leveraged to modify timing parameter(s) of clocks that coordinate operations of the horizontal scanner and the ADC (e.g., and/or digital component(s) included in the mixed signal circuit). For example, the clocks associated with the horizontal scanner and the ADC can be independently tuned to optimize mixed signal circuit performance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.