Method and system for generating parallel codes
US7930623B2 · kind B2 · utility
16Cited by
5References
24Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 8, 2006 |
| Grant date | Apr 19, 2011 |
| Priority date | — |
| Expiry date | Feb 17, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04J13/0074
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A method for generating parallel codes is provided that includes generating a plurality of pairs of outputs for each clock cycle using a single code generator and generating a code based on each pair of outputs using the single code generator.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.