Hardware-accelerated packet multicasting in a virtual routing system
US7933269B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 3, 2007 |
| Grant date | Apr 26, 2011 |
| Priority date | — |
| Expiry date | Dec 30, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2012/6489
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Methods and systems are provided for hardware-accelerated packet multicasting in a virtual routing system. According to one embodiment, a multicast packet is received at an ingress system of a packet-forwarding engine (PFE). The ingress system identifies flow classification indices for the multicast packet. Then, for each instance of multicasting, the ingress system sends a single copy of the multicast packet and the flow classification indices to an egress system of the PFE. The single copy of the multicast packet is buffered in a memory accessible by the egress system. The egress system prepares the multicast packet for transmission by for each flow classification index, identifying corresponding transform control instructions based on the flow classification index, reading the single copy of the multicast packet from the memory, causing the multicast packet to be transformed in accordance with the identified transform control instructions and outputting the transformed multicast packet.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.