Sub-harmonic mixer
US7933576B2 · kind B2 · utility
4Cited by
9References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 28, 2007 |
| Grant date | Apr 26, 2011 |
| Priority date | — |
| Expiry date | Aug 1, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03D2200/0043
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A sub-harmonic mixer is provided, which includes: a mixer core having first and second transistors performing switching operations in response to a local oscillator (LO) signal and a radio frequency (RF) signal; a power source applying bias maximizing nonlinearity of a transistor included in the mixer core; an RF port applying an RF signal to the mixer core; an LO port applying an LO signal to the mixer core; and first and second phase delay circuits in which the RF signals applied to the first and second transistors have a 180-degree phase difference.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.